Mounting of semiconductor-on-diamond wafers for device processing
US11404300B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Mar 26, 2020 |
| Grant date | Aug 2, 2022 |
| Priority date | — |
| Expiry date | Nov 6, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/68381
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a semiconductor-on-diamond-on-carrier substrate wafer. The semiconductor-on-diamond-on-carrier wafer comprises: a semiconductor-on-diamond wafer having a diamond side and semiconductor side; a carrier substrate disposed on the diamond side of the semiconductor-on-diamond wafer and including at least one layer having a lower coefficient of thermal expansion (CTE) than diamond; and an adhesive layer disposed between the diamond side of the semiconductor-on-diamond wafer and the carrier substrate to bond the carrier substrate to the semiconductor-on-diamond wafer. The semiconductor-on-diamond-on-carrier substrate wafer has the following characteristics: a total thickness variation of no more than 40 μm; a wafer bow of no more than 100 μm; and a wafer warp of no more than 40 μm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.