Array substrate and manufacturing method thereof, and display panel
US11404579B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2020 |
| Grant date | Aug 2, 2022 |
| Priority date | — |
| Expiry date | Jul 21, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/131
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure provides an array substrate and a manufacturing method thereof, and a display panel. In the array substrate, a functional layer disposed between an active layer and a gate insulating layer protects the active layer during etching of the active layer, which prevents the active layer from damage and conducts a source/drain layer and the active layer, so that transistors in the array substrate work normally, solving the technical problem that current display panels damage the active layer during a preparation process, which causes performance of thin film transistors to decrease.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.