Graphics processing unit
US11409523B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 4, 2021 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Jan 15, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics processing unit includes a sparse matrix detection unit, a register file, an assertion register, and a matrix calculation unit. The sparse matrix detection unit reads a plurality of matrices from a storage device and determines whether the matrices are zero matrices or non-zero matrices to output a determination result. The register file stores the plurality of matrices from the sparse matrix detection unit. The assertion register marks up the matrices according to the determination result, and outputs a mark result. The matrix calculation unit receives a matrix calculation instruction, reads the non-zero matrices in the plurality of matrices from the register file according to the mark result, and calculates the non-zero matrices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.