Buffer checker for task processing fault detection
US11409557B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2019 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Jul 13, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/83
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics processing system for operation with a data store, comprising: one or more processing units for processing tasks; a check unit operable to form a signature which is characteristic of an output from processing a task on a processing unit; and a fault detection unit operable to compare signatures formed at the check unit; wherein the graphics processing system is operable to process each task first and second times at the one or more processing units so as to, respectively, generate first and second processed outputs, the graphics processing system being configured to: write out the first processed output to the data store; read back the first processed output from the data store and form at the check unit a first signature which is characteristic of the first processed output as read back from the data store; form at the check unit a second signature which is characteristic of the second processed output; compare the first and second signatures at the fault detection unit; and raise a fault signal if the first and second signatures do not match.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.