Hardware bit-vector techniques
US11409617B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | May 22, 2020 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Feb 4, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/84
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various implementations described herein are related to a device having energy harvesting circuitry that experiences power failures. The device may include computing circuitry having a processor coupled to the energy harvesting circuitry. The processor may be configured to reduce a number of write operations to a log structure having a hardware bit-vector used by the computing circuitry to boost computational progress even with the power failures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.