Processor element matrix performing maximum/average pooling operations
US11409694B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2020 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Jul 23, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/088
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor is provided. The processor includes a plurality of processing elements configured to be arranged in a matrix form, and a controller configured to control the plurality of processing elements during a plurality of cycles to process a target data, control first processing elements so that each of the first processing elements operates data provided from adjacent first processing elements and the input first element and inputs each of second elements included in a second row among the plurality of elements to second processing elements arranged in the second row among the plurality of processing elements, control the second processing elements so that each of the second processing elements operates data provided from adjacent second processing elements and the input second element, and operates data provided from the adjacent first processing elements in the same column among the first processing elements and pre-stored operation data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.