Dual gate array substrate and display device
US11410627B2 · kind B2 · utility
1Cited by
0References
16Claims
0Family size
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Key dates
| Filing date | Mar 31, 2020 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Jun 6, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The embodiment of the present disclosure provides a dual gate array substrate and a display device. The dual gate array substrate includes pairs of gate lines and data lines. The pairs of gate lines and the data lines intersect perpendicularly to define multiple display units arranged in an array. The display units include two sub-pixels of a same color, and the sub-pixels of the same color on both sides of one data line are coupled to the one data line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.