Semiconductor device and data reading method using the same
US11410724B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 7, 2020 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Aug 7, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided. The device includes a memory that stores data in a non-volatile and volatile manner and a memory controller configured to control the memory. The memory includes a word line pair including a first and second word line, a first bit line pair orthogonal to the first and the second word line and including a first bit line and a first complementary bit line, and a memory cell pair including first and second memory cells adjacent to the first memory cell in a word line direction. A left node of the first memory cell, and a right node of the first memory cell and a left node of the second memory cell, are all connected to the first word line, and a value of the data stored in the memory cell pair in the non-volatile manner is determined according to the selected first word line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.