Multi-layer die attachment
US11410913B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2020 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Mar 18, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15313
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A packaged electrical device that includes a cured adhesive layer and a cured layer of die attach material coupled between a semiconductor die and a substrate. The packaged electrical device may also include wire bonds coupled between the substrate and leads of the semiconductor die. In addition, the packaged electrical device may be encapsulated in molding compound. A method for fabricating a packaged electrical device. The method includes printing a layer of die attach material over a semiconductor wafer and applying a layer of 2-in-1 die attach film over the layer of die attach material. The method also includes singulating the semiconductor wafer to create a semiconductor die and placing the semiconductor die onto a substrate. In addition the method includes wire bonding the substrate to leads of the semiconductor die and encapsulating the device in molding compound.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.