Integrated circuit including multiple height cell and method of designing the same
US11410988B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2021 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Feb 22, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a standard cell continuously arranged on a first row and on a second row, the first row and second row extending parallel with each other in a first direction, the first row and the second row adjacent to each other in a second direction crossing the first direction, a first cell separator contacting a first row boundary of the standard cell on the first row and extending in the second direction, and a second cell separator contacting a second row boundary of the standard cell on the second row and extending in the second direction. The first cell separator and the second cell separator are discontinuous on a first row to second row boundary of the first row and the second row.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.