Electronic system, integrated circuit die and operation method thereof
US11411560B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 30, 2021 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Jul 30, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronic system, an integrated circuit die and an operation method thereof are provided. The integrated circuit die includes a plurality of interface circuit slices and a merging circuit. The transmission data stream sent from the transmitter die is split into a plurality of sub-data streams. Each of the interface circuit slices provides a physical layer to receive the corresponding one of the sub-data streams. The merging circuit is coupled to the interface circuit slices to receive the sub-data streams. The merging circuit merges the sub-data streams from the interface circuit slices back to the original data corresponding to the transmission data stream to be provided to an application layer. The merging circuit aligns the sub-data streams from the interface circuit slices in timing to mitigate different delays of the interface circuit slices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.