Semiconductor device with a contact plug adjacent a gate structure
US11417652B2 · kind B2 · utility
4Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2019 |
| Grant date | Aug 16, 2022 |
| Priority date | — |
| Expiry date | Apr 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate, a gate structure on the substrate, a first etch stop layer, a second etch stop layer, and an interlayer insulation layer that are stacked on the gate structure, and a contact plug penetrating the interlayer insulation layer, the second etch stop layer, and the first etch stop layer and contacting a sidewall of the gate structure. The contact plug includes a lower portion having a first width and an upper portion having a second width. A lower surface of the contact plug has a stepped shape.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.