Dual shield oxide damage control

US11417736B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Peng Li · 流花街道, CN
• Ya-Ping Chen · Chengdu, CN
• Yunlong Liu · Chengdu, CN
• Hong-Seon Yang · Yongsan-gu, KR
• Shengpin Yang · Sichuan, CN
• Jing Hu · Beijing, CN
• Chao Zhuang · Chengdu, CN

Key dates

• Filing date: Feb 4, 2021
• Grant date: Aug 16, 2022
• Expiry date: Feb 4, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/513

Abstract

A method (200) of fabricating a semiconductor device includes etching (205) a group of trenches in a semiconductor surface layer of a substrate. The group of trenches includes an outermost trench that has a first width and remaining trenches of the group of trenches have a second width that is less than the first width. The outermost trench is formed at an edge of the group of trenches. A dielectric liner is formed (210) in the group of trenches and the dielectric liner is etched (215) in an upper portion of the group of trenches to remove a partial thickness of the dielectric liner. A full thickness of the dielectric liner is maintained in a lower portion of the group of trenches. The group of trenches is filled (220) with a polysilicon layer.