Method of making a semiconductor device using nano-imprint lithography for formation of a selective growth mask
US11417794B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2018 |
| Grant date | Aug 16, 2022 |
| Priority date | — |
| Expiry date | Apr 25, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/817
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A growth mask layer is formed over a semiconductor material layer on a substrate. Optionally, a patterned hard mask layer can be formed over the growth mask layer. A nano-imprint lithography (NIL) resist layer is applied, and is imprinted with a pattern of recesses by stamping. The pattern in the NIL resist layer through the growth mask layer to provide a patterned growth mask layer with clusters of openings therein. If a patterned hard mask layer is employed, the patterned hard mask can prevent transfer of the pattern in the area covered by the patterned hard mask layer. Semiconductor material portions, such as nanowires can be formed in a cluster configuration through the clusters of openings in the patterned growth mask layer. Alignment marks can be formed concurrently with formation of semiconductor material portions by employing nano-imprint lithography.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.