Amplifier circuits
US11418153B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2020 |
| Grant date | Aug 16, 2022 |
| Priority date | — |
| Expiry date | Sep 21, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/129
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This application relates to amplifier circuitry and, in particular, to class-D amplifier circuits. The application describes amplifier circuitry (400) for receiving an input signal (Sin) and generating first and second driving signals (SoutP, SoutN) for driving a bridge-tied-load. The amplifier circuitry includes first and second class-D output stages (403p, 403n) for generating the first and second driving signals based on the input signal. A controller (406) controllably varies a common-mode component of the first and second driving signals based on an indication of amplitude of the first and second driving signals. The controller varies the common-mode component, at lower signal amplitudes, so the common-mode level of the first and second driving signals is moved away from an operating region that leads to distortion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.