Patent · US Active

System and method for field programmable gate array-assisted binary translation

US11422815B2 · kind B2 · utility

0Cited by

9References

8Claims

0Family size

Assignee

Dell Products L.P. · US

Inventors

Mukund P. Khatri · Austin, US
Ramesh Radhakrishnan · Saratoga, US

Key dates

Filing date	Mar 1, 2018
Grant date	Aug 23, 2022
Priority date	—
Expiry date	Feb 18, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG06F15/7889
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Binary translation may be performed by a field programmable gate array (FPGA) integrated with a processor as a single integrated circuit. The FPGA contains multiple blocks of logic for performing different binary translations. The processor may offload the binary translation to the FPGA. The FPGA may use historical logging to skip the binary translation of source instructions that have been previously translated into target instructions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.