Patent · US Active

Arithmetic device and arithmetic method

US11423291B2 · kind B2 · utility

1Cited by
6References
11Claims
0Family size

Assignee

Inventor

Key dates

Filing dateFeb 25, 2020
Grant dateAug 23, 2022
Priority date
Expiry dateMar 17, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06N3/0464
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An arithmetic device includes storage, a controller, and operation circuitry. The storage stores therein P-dimensional input vectors, P×N-dimensional matrixes, N-dimensional intermediate value vectors, and N-dimensional output vectors, and is capable of executing, in parallel, two or more of reading processing of the input vector, reading processing of the matrix, reading processing of the intermediate value vector, and writing processing of the output vector. The controller sets read timings of a first input vector, a first matrix, and a first intermediate value vector, and write timing of a first output vector, in operation processing including a D-dimensional processing loop. The operation circuitry calculates product of the first input vector and the first matrix, calculates sum of the product and the first intermediate value vector, and stores the sum as the first output vector in the storage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.