Three-dimensional semiconductor memory devices and methods of fabricating the same
US11424259B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 2020 |
| Grant date | Aug 23, 2022 |
| Priority date | — |
| Expiry date | Sep 3, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
Abstract
Three-dimensional semiconductor memory devices and methods of fabricating the same are provided. A memory device may include a semiconductor layer including first and second regions, first vertical structures on the first region and extending in a first direction perpendicular to a top surface of the semiconductor layer, and second vertical structures on the second region and extending in the first direction. The first vertical structure may include a vertical semiconductor pattern extending in the first direction and in contact with the semiconductor layer, and a first data storage pattern surrounding the vertical semiconductor pattern. The second vertical structure may include an insulation structure extending in the first direction and in contact with the semiconductor layer, and a second data storage pattern surrounding the insulation structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.