Successive approximation register analog-to-digital converter with embedded filtering
US11424756B2 · kind B2 · utility
0Cited by
5References
20Claims
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Key dates
| Filing date | Aug 31, 2020 |
| Grant date | Aug 23, 2022 |
| Priority date | — |
| Expiry date | Aug 31, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/468
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A successive approximation register (SAR) analog-to-digital converter includes a capacitive digital-to-analog converter (CDAC), a comparator, and a SAR control circuit. The comparator is coupled to an output of the CDAC. The SAR control circuit is coupled to an input of the CDAC and to an output of the comparator. The SAR control circuit is configured to provide a feedback signal to the CDAC. The CDAC is configured to apply the feedback signal to form an infinite impulse response filter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.