Tiled displays and methods of manufacturing the same
US11425826B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2018 |
| Grant date | Aug 23, 2022 |
| Priority date | — |
| Expiry date | Jul 18, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/54426
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A tiled display having pixels arranged in rows and columns, and including first and second tiles. The tiles comprise a substrate carrying a matrix of pixels arranged at a pixel pitch. The substrates comprise an edge extending between opposing faces in a depth direction. The substrate edges have a complementary shape, and face one another to establish a seam. The pixel pitch is maintained across the seam. Pixels of the second tile are not interposed between pixels of the first tile. The complementary shape includes a segment of the seam being oblique to the pixel rows, or the substrate edge of the first tile profiled in the depth direction whereby at least a section of the edge is non-perpendicular to the faces. The tiled display can maintain the pixel pitch at the seams at high resolutions (e.g., pixel pitch less than 0.5 mm).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.