Semiconductor device and method of fabricating the same
US11430779B2 · kind B2 · utility
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5References
20Claims
0Family size
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Key dates
| Filing date | Sep 22, 2020 |
| Grant date | Aug 30, 2022 |
| Priority date | — |
| Expiry date | Oct 7, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6757
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed are a semiconductor device and a method of fabricating the same. The method includes placing a standard cell, resizing a power via pattern in such a way that the power via pattern has a different width from a width of other via pattern, and applying different design rules to the power via pattern and the other via pattern, respectively, to perform a routing operation on the standard cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.