Vertical semiconductor devices
US11430800B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 2020 |
| Grant date | Aug 30, 2022 |
| Priority date | — |
| Expiry date | Oct 9, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
Abstract
A vertical semiconductor device may include a stacked structure, a channel structure and a lower connection structure. The stacked structure may include insulation layers and gate electrodes alternately repeatedly stacked. The stacked structure may be spaced apart from an upper surface of a substrate. The channel structure may include a charge storage structure and a channel. The channel structure may pass through the stacked structure. The lower connection structure may be formed on the substrate. The lower connection structure may be electrically connected with the channel and the substrate. A sidewall of the lower connection structure may include a protrusion disposed at a central portion of the sidewall from the upper surface of the substrate in a vertical direction. The vertical semiconductor device may have a high reliability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.