Chip antenna module and method of manufacturing chip antenna module
US11431107B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2020 |
| Grant date | Aug 30, 2022 |
| Priority date | — |
| Expiry date | Jan 10, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01Q21/28
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A chip antenna module includes: a first dielectric layer; a first feed via extending through the first dielectric layer; a second feed via extending through the first dielectric layer; a first patch antenna pattern disposed on an upper surface of the first dielectric layer, electrically connected to the first feed via, and having a through-hole through which the second feed via passes; a second patch antenna pattern disposed above the first patch antenna pattern and electrically connected to the second feed via; and a second dielectric layer and a third dielectric layer, respectively located vertically between the first patch antenna pattern and the second patch antenna pattern, and having different dielectric constants that form a first dielectric constant boundary surface between the first and second patch antenna patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.