Dual power supply detection circuit
US11431340B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2021 |
| Grant date | Aug 30, 2022 |
| Priority date | — |
| Expiry date | Jan 6, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This disclosure relates to a dual power supply detection circuit including first and second input stage field effect transistors, an inverter stage, a feedback stage field effect transistor, and first and second compensation circuits. The inverter stage includes a complimentary pair of transistors, and the complementary pair of transistors includes an NMOS transistor and a PMOS transistor configured and arranged so that gate lengths of the PMOS and NMOS transistors are different. The disclosure also relates to an integrated circuit including a dual power supply detection circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.