Epitaxies of a chemical compound semiconductor
US11437235B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Nov 10, 2020 |
| Grant date | Sep 6, 2022 |
| Priority date | — |
| Expiry date | Dec 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/472
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and structures includes providing a substrate, forming a prelayer over a substrate, forming a barrier layer over the prelayer, and forming a channel layer over the barrier layer. Forming the prelayer may include growing the prelayer at a graded temperature. Forming the barrier layer is such that the barrier layer may include GaAs or InGaAs. Forming the channel layer is such that the channel layer may include InAs or an Sb-based heterostructure. Thereby structures are formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.