Structures to facilitate heat transfer within package layers to thermal heat sink and motherboard

US11437294B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Sameer Shekhar · Portland, US
• Amit Jain · Marlboro, US
• Kaladhar Radhakrishnan · Chandler, US
• Jonathan P. Douglas · Portland, US
• Chin Lee Kuan · Bentong, MY

Key dates

• Filing date: Aug 9, 2018
• Grant date: Sep 6, 2022
• Expiry date: Jan 6, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/16152
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Embodiments disclosed herein include electronics packages with improved thermal pathways. In an embodiment, an electronics package includes a package substrate. In an embodiment, the package substrate comprises a plurality of backside layers, a plurality of front-side layers, and a core layer between the plurality of backside layers and the plurality of front-side layers. In an embodiment, an inductor is embedded in the plurality of backside layers. In an embodiment, a plurality of bumps are formed over the front-side layers and thermally coupled to the inductor. In an embodiment, the plurality of bumps are thermally coupled to the core layer by a plurality of vias.