Semiconductor device having a capacitive structure and method of forming the same

US11437406B2 · kind B2 · utility

Assignee

• GlobalFoundries Singapore Pte. Ltd. · SG

Inventors

• Phyllis Shi Ya LIM · Singapore, SG
• Handoko Linewih · Singapore, SG
• Shu Zhong · Dongguan, CN
• Chor Shu CHENG · Singapore, SG

Key dates

• Filing date: Dec 20, 2019
• Grant date: Sep 6, 2022
• Expiry date: Aug 4, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/201

Abstract

A semiconductor device may be provided, including a substrate which includes a first semiconductor layer having a well region arranged within the first semiconductor layer, a buried insulator layer arranged over the first semiconductor layer, and a second semiconductor layer arranged over the buried insulator layer. The semiconductor device may include a capacitive structure including: the well region, at least one contact to the well region, at least a portion of the buried insulator layer over the well region, at least a portion of the second semiconductor layer, a source region and a drain region arranged over the second semiconductor layer, a gate dielectric layer arranged over the second semiconductor layer and arranged laterally between the source region and the drain region, and a gate layer arranged over the gate dielectric layer. The well region, the source region, and the drain region may have the same conductivity type.