Method and system for monolithic integration of photonics and electronics in CMOS processes

US11438065B2 · kind B2 · utility

Assignee

• Luxtera, Inc. · US

Inventors

• Attila Mekis · Carlsbad, US
• Peter DeDobbelaere · San Diego, US
• Kosei Yokoyama · San Diego, US
• Sherif Abdalla · Carlsbad, US
• Steffen Gloeckner · San Diego, US
• John Andrew Guckenberger · San Diego, US
• Thierry Pinguet · Cardiff-by-the-Sea, US
• Gianlorenzo Masini · Carlsbad, US
• Daniel Kucharski · Carlsbad, US

Key dates

• Filing date: Apr 8, 2019
• Grant date: Sep 6, 2022
• Expiry date: Jun 7, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D88/00
• WIPO field: Telecommunications
• WIPO sector: Electrical engineering

Abstract

Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses. The devices may be fabricated on semiconductor-on-insulator (SOI) wafers utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.