Power supply circuit alternately switching between normal operation and sleep operation
US11442480B2 · kind B2 · utility
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2Claims
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Key dates
| Filing date | Mar 18, 2020 |
| Grant date | Sep 13, 2022 |
| Priority date | — |
| Expiry date | Mar 18, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/59
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A power supply circuit in which an increase in a leakage current can be suppressed is provided. In a power supply circuit in which a main LDO unit outputs a first internal voltage during a normal operation and a sub LDO unit outputs a sleep voltage during a sleep operation, the sleep voltage is applied to a drain of a transistor, and an external voltage higher than the sleep voltage is applied to a gate and a back gate thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.