Memory system having non-volatile memory
US11443829B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 2, 2020 |
| Grant date | Sep 13, 2022 |
| Priority date | — |
| Expiry date | Sep 2, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/1202
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a non-volatile memory and a controller configured to divides an n-dimensional space into a plurality of regions by a plurality of hyperplanes, assign a representative point of a read level for reading data from a plurality of memory cells to each region, trace a branch node in the binary tree by determining whether a first read level is higher or lower than a voltage level at the branch node of the binary tree, determine a read level of a representative point assigned to a region correlated with a leaf node among the plurality of divided regions as a second read level corresponding to the first read level when reaching the leaf node of the binary tree by tracing the branch node in the binary tree, and cause the memory to read data of the cells by applying a voltage of the second read level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.