Method for making semiconductor device by adopting stress memorization technique

US11443986B2 · kind B2 · utility

Assignee

• Shanghai Huali Integrated Circuit Corporation · CN

Inventors

• Weiwei Ma · 南丰镇, CN
• Chao Sun · Hangzhou City, CN
• Wei Lu · Singapore, SG
• Xiaolin Xu · Pleasanton, US
• Yamin Cao · Shanghai, CN
• Wei Zhou · Nanhu, CN

Key dates

• Filing date: Jan 13, 2021
• Grant date: Sep 13, 2022
• Expiry date: May 9, 2041

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02P70/50
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The application discloses a method of applying the stress memorization technique in making the semiconductor device which includes: step 1: forming a front gate structure on a silicon wafer having front and back surfaces; step 2: forming sidewalls including a first silicon nitride sidewall, a first silicon nitride layer corresponding to the first silicon nitride sidewall covering a first polysilicon layer on the wafer's back surface; step 3: growing a second silicon nitride layer on the wafer's front surface; step 4: etching the silicon nitride after stress transfer is completed, including: step 41: performing front single-wafer wet etching; step 42: performing batch wet etching to completely remove the second silicon nitride layer and reduces the thickness of the first silicon nitride layer on the back surface; step 5: completing the subsequent process. The application can improve the wafer flatness for improved photolithography for back-end-of-line processes and thereby increasing product yield.