Hardware-efficient fault-tolerant operations with superconducting circuits
US11449384B2 · kind B2 · utility
3Cited by
9References
20Claims
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Key dates
| Filing date | Jan 5, 2019 |
| Grant date | Sep 20, 2022 |
| Priority date | — |
| Expiry date | Sep 4, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D48/3835
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for providing hardware-efficient fault-tolerant quantum operations are provided. In some aspects a cavity and an ancilla transmon are used to implement a quantum operation by encoding a logical qubit using more than two energy levels of the cavity, encoding information using more than two energy levels of the ancilla transmon, and creating an interaction between the cavity and the ancilla transmon that decouples at least one error type in the ancilla transmon from the cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.