Neural network training method for memristor memory for memristor errors
US11449754B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2022 |
| Grant date | Sep 20, 2022 |
| Priority date | — |
| Expiry date | Feb 16, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a neural network training method for a memristor memory for memristor errors, which is mainly used for solving the problem of decrease in inference accuracy of a neural network based on the memristor memory due to a process error and a dynamic error. The method comprises the following steps: performing modeling on a conductance value of a memristor under the influence of the process error and the dynamic error, and performing conversion to obtain a distribution of corresponding neural network weights; constructing a prior distribution of the weights by using the weight distribution obtained after modeling, and performing Bayesian neural network training based on variational inference to obtain a variational posterior distribution of the weights; and converting a mean value of the variational posterior of the weights into a target conductance value of the memristor memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.