Hardware-assisted emulation of graphics pipeline
US11450056B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2021 |
| Grant date | Sep 20, 2022 |
| Priority date | — |
| Expiry date | May 17, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T17/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example method of hardware-assisted graphics pipeline emulation comprises: computing, based on an input set graphic primitives, a set of tessellation factors; computing, based on the input set graphic primitives, a set of points specifying a plurality of patches; computing, based on the set of points, a tessellation count buffer; generating, based on the set of points and the tessellation count buffer, a tessellation offset buffer; performing, using the tessellation offset buffer, a tessellation setup stage; performing, by a graphics processing unit (GPU), a tessellation stage based on the set of tessellation factors, wherein the tessellation stage generates a plurality of output points corresponding to one or more patches of the plurality of patches; and computing, by a domain shader stage, a plurality of vertex positions defined by the plurality of output points.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.