Patent · US Active

Method of testing slave device of inter-integrated circuit bus

US11450398B2 · kind B2 · utility

0Cited by
6References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 25, 2021
Grant dateSep 20, 2022
Priority date
Expiry dateFeb 12, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2029/0401
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method of testing a slave device of an Inter-Integrated Circuit (I2C) bus is provided. The method includes the following steps: (A) starting a first read operation or a first write operation of the slave device, the first read operation or the first write operation including a sub-operation of sending a command, an acknowledgement signal, data, an address or a control byte to the slave device; (B) sending a start command or an end command to the slave device after or during the sub-operation; (C) after step (B), performing a second read operation or a second write operation on the slave device; and (D) after step (C), determining whether the second read operation or the second write operation is correctly performed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.