Isolation amplification circuit with improved common mode rejection
US11451203B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2019 |
| Grant date | Sep 20, 2022 |
| Priority date | — |
| Expiry date | Apr 25, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2017/0298
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An isolation amplification circuit having an input stage circuitry and a control circuitry stage interconnected through a galvanic isolation barrier. The input stage circuitry includes a first filter network and a second filter network for supplying first and second output signals in response to the application of first and second electrical input signals. The input stage circuitry includes a first feedback path configured for applying a first feedback signal to a common node of the first filter network to close a first feedback loop around the first filter network and a second feedback path configured for applying a second feedback signal to a common node of the second filter network to close a second feedback loop around the second filter network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.