Timing signal synchronisation
US11455002B1 · kind B1 · utility
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3References
21Claims
0Family size
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Key dates
| Filing date | May 27, 2021 |
| Grant date | Sep 27, 2022 |
| Priority date | — |
| Expiry date | May 27, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04R2499/15
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device comprising: a data interface comprising: a data input for receiving a data signal; a clock input for receiving a clock signal for clocking the data signal; and a timing input for receiving a first timing signal having a first frequency; and a timing signal generator configured to generate, based on the first timing signal and the data signal, a second timing signal having a second frequency, the first frequency being a integer multiple of the second frequency, a phase of the second timing signal being aligned with an event in the data signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.