Semiconductor device having separate initialization voltage lines
US11455943B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2021 |
| Grant date | Sep 27, 2022 |
| Priority date | — |
| Expiry date | Mar 1, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L25/0753
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display device includes a substrate, a polycrystalline semiconductor layer including a channel of a driving transistor, and a channel of a seventh transistor, a gate electrode of the driving transistor overlapping the channel thereof, a gate electrode of the seventh transistor overlapping the channel thereof, an oxide semiconductor layer including a channel of a fourth transistor, a gate electrode thereof overlapping the channel of the fourth transistor, a first initialization voltage line connected to a first electrode of the fourth transistor, the first initialization voltage line and the gate electrode of the fourth transistor being position on a same layer, and a second initialization voltage line connected to a second electrode of the seventh transistor, the second initialization voltage line and the first initialization voltage line being positioned on different layers from each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.