Semiconductor device and method for manufacturing the same
US11456218B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2020 |
| Grant date | Sep 27, 2022 |
| Priority date | — |
| Expiry date | Dec 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
Abstract
A semiconductor device and a method for manufacturing the semiconductor device. Multiple stacks and an isolation structure among the multiple stacks are formed on a substrate. Each stack includes a first doping layer, a channel layer and a second doping layer. For each stack, the channel layer is laterally etched from at least one sidewall of said stack to form a cavity located between the first doping layer and the second doping layer, and a gate dielectric layer and a gate layer are formed in the cavity. A first sidewall of each stack is contact with the isolation structure, and the at least one sidewall does not include the first side wall. Costly high-precision etching is not necessary, and therefore a device with a small size and a high performance can be achieved with a simple process and a low cost. Diversified device structures can be provided on requirement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.