Dynamic frame rate adjustment mechanism
US11457173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2021 |
| Grant date | Sep 27, 2022 |
| Priority date | — |
| Expiry date | Jan 21, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2370/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a control method of a processor, wherein the control method comprises the steps of: transmitting image data of a first frame to an integrated circuit, wherein the first frame corresponds to a first frame rate; determining a second frame rate of a second frame next to the first frame; determining if a difference between the second frame rate and the first frame rate belongs to a large scale frame rate adjustment or a small scale frame rate adjustment; if the difference between the second frame rate and the first frame rate belongs to the large scale frame rate adjustment, using a first mode to transmit image data of the second frame; and if the difference between the second frame rate and the first frame rate belongs to the small scale frame rate adjustment, using a second mode to transmit image data of the second frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.