Radio communications
US11457423B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2018 |
| Grant date | Sep 27, 2022 |
| Priority date | — |
| Expiry date | Apr 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W56/004
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A radio receiver device is arranged to store samples of incoming data symbols in an indexed memory portion having a length of A+B+C. A first data buffer 20-1 has an initial address at index 0 and a final address at index A-1. A timing adjustment buffer 22 has an initial address at index A and a final address at index A+B−1. A second data buffer 20-2 has an initial address at an index A+B and a final address at an index A+B+C−1. A buffer switch pointer 24 has a trigger address between the index 0 and the index A+B−1, at which it triggers a switch 26 from the first to the second buffer. If the current address matches the trigger address, the current address is set to the index A+B. Otherwise, the current address is incremented. If there is a timing offset between local and network clocks, the trigger address is moved to reduce the offset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.