Efficient computing hardware and software component design testing through test fragmentation and isolated execution within a discrete computing environment
US11461223B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2020 |
| Grant date | Oct 4, 2022 |
| Priority date | — |
| Expiry date | Apr 1, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/5011
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method, a device, a system and/or a manufacture of efficient computing hardware and software component testing through test fragmentation and isolated execution within a discrete computing environment. In one embodiment, a method for efficient testing includes copying a design fileset into an operation filesystem and read-only protecting to define a workspace master. A test fileset may be fractionated into a test script. A discrete environment (e.g., a computing container and/or a virtual computer) is initiated and assigned computing resources. The workspace master is cloned. The test script is extracted from a test queue and executed within the workspace clone to generate a result data. Upon a test passage determination, a tear-down instruction is executed for the discrete environment. Upon a test failure determination, a substrate filesystem, the design fileset, and/or the test fileset may be designated for storage retention.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.