Disaggregated memory server
US11461263B2 · kind B2 · utility
2Cited by
10References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2020 |
| Grant date | Oct 4, 2022 |
| Priority date | — |
| Expiry date | Sep 18, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/351
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for managing memory resources. In some embodiments, the system includes a first memory server, a second memory server, and a server-linking switch connected to the first memory server and to the second memory server. The first server may include a cache-coherent switch and a first memory module. In some embodiments, the first memory module is connected to the cache-coherent switch, and the cache-coherent switch is connected to the server-linking switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.