Slew rate boosting circuit, source driver chip and display device
US11462142B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 19, 2021 |
| Grant date | Oct 4, 2022 |
| Priority date | — |
| Expiry date | May 19, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/21
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A slew rate boosting circuit, a source driver chip and a display device are provided in the present disclosure. The slew rate boosting circuit comprises: a first latch configured to receive and store first data; a second latch configured to receive and store second data, the second data being next to the first data; a first level shifter; an amplifier; and a slew rate boosting module configured to receive a high voltage data signal as current input data, and adjust a slew rate of an output stage of the amplifier according to a value of a specified bit of the first data, a value of a specified bit of the second data and the current input data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.