Patent · US Active

Wafer acceptance test module and method for a static memory function test

US11462290B2 · kind B2 · utility

0Cited by

2References

9Claims

0Family size

Assignee

Shanghai Huali Integrated Circuit Corporation · CN

Inventors

Zhenan Lai · Shanghai, CN
Junsheng Chen · Beijing, CN
Zhaoying Huang · Shanghai, CN

Key dates

Filing date	Jun 15, 2020
Grant date	Oct 4, 2022
Priority date	—
Expiry date	Jan 30, 2041

Classification

Technology area (CPC H)Electricity
CPC primaryH03K5/19
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The disclosure discloses a wafer acceptance test module for a static memory function test, reduced instruction built-in self-test circuit formed on a wafer includes: a ring oscillator, a frequency divider, a counter, a data latch and comparator. The counter is used for count, and the count is used as an input signal of each of an address decoder and a data input port at the same time. The data latch and comparator is connected to an output terminal of the address decoder and an output terminal of the sense amplifier and compare two output signals to obtain a test result. The disclosure also discloses a wafer acceptance test method for a static memory function test. The disclosure does not need to rely on a dedicated test machine for memory to perform a static memory function test, which can simplify a test procedure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.