Semiconductor device and method of forming the same
US11462623B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2021 |
| Grant date | Oct 4, 2022 |
| Priority date | — |
| Expiry date | Apr 10, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate including an active region, a gate trench disposed in the substrate and crossing the active region; a gate dielectric layer disposed in the gate trench; a first gate electrode disposed on the gate dielectric layer and including center and edge portions; a second gate electrode disposed on the first gate electrode; a gate capping insulating layer disposed on the second gate electrode and filling the gate trench; and first and second impurity regions disposed in the substrate opposite to each other with respect to the gate trench. A top surface of each of the center and edge portions contacts a bottom surface of the second gate electrode. The top surface of the second gate electrode is concave. The bottom surface of the gate capping insulating layer is convex, and a side surface of the gate capping insulating layer contacts the gate dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.