Ramp generator for buck/boost converters
US11463005B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2020 |
| Grant date | Oct 4, 2022 |
| Priority date | — |
| Expiry date | Sep 5, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/0025
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
In some examples, a converter circuit can be configured to operate in a buck-boost mode. The converter circuit can include a ramp generator that can be configured to generate first and second ramp signals that at least partially overlap respective portions of a buck-boost region during each intermediate clock cycle between clock cycles of a clock signal. By generating the first and second ramp signals during each intermediate clock cycle, first and second drivers can be provided to toggle switches of a power stage, such that an output voltage provided by the power stage can be averaged out over clock cycles of the clock signal to allow for a gradual transition between buck and boost modes of operation of the converter circuit. In some examples, the converter circuit can be configured to operate in a test mode and can be configured to implement trimming of a ramp signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.