Patent · US Active

Zero-delay phase-locked loop frequency synthesizer based on multi-stage synchronization

US11463096B2 · kind B2 · utility

1Cited by
3References
3Claims
0Family size

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Key dates

Filing dateSep 30, 2021
Grant dateOct 4, 2022
Priority date
Expiry dateSep 30, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04B1/40
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Disclosed is a zero-delay phase-locked loop frequency synthesizer based on multi-stage synchronization, which belongs to the technical field of integrated circuits. The zero-delay phase-locked loop frequency synthesizer comprises: a phase frequency detector, a charge pump, a loop pass filter, a voltage control oscillator and a multi-stage synchronization divider, wherein the phase frequency detector, the charge pump, the loop pass filter and the voltage control oscillator are connected in sequence; an output OUT of the voltage control oscillator is connected to an input IN of the multi-stage synchronization divider; and an output OUT of the multi-stage synchronization divider is connected to an input IN of the phase frequency detector, so as to form a feedback path.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.