Data accessing method, memory control circuit unit and memory storage device
US11467773B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 2021 |
| Grant date | Oct 11, 2022 |
| Priority date | — |
| Expiry date | Feb 28, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data accessing method, a memory control circuit unit, and a memory storage device are provided. The data accessing method includes the following steps. A reading command is received from a host system, in which the reading command instructs to read a first logical address, the first logical address is mapped to a first physical programming unit, and the first physical programming unit corresponds to a first physical erasing unit. A first data is generated after receiving the reading command, and the first data is written to a second physical programming unit included in the first physical erasing unit. A second data stored in the first physical programming unit is read after the first data is written, so as to respond to the reading command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.