Array substrate, display panel and display device
US11469256B2 · kind B2 · utility
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13Claims
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Key dates
| Filing date | Mar 26, 2020 |
| Grant date | Oct 11, 2022 |
| Priority date | — |
| Expiry date | Dec 24, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/441
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An array substrate includes a base substrate and a GND trace. The GND trace is disposed along an edge of the substrate, and the GND trace includes a plurality of conductive line segments separated from each other and a connection structure disposed on a side of the GND trace away from the base substrate. The connection structure electrically connects the conductive line segments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.